ANTWERP, Belgium – The Imec research institute described machine learning accelerators using arrays of resistive and magnetic memory cells rather than neural networks to reduce cost and power. Initial results included an MRAM array that lowered power by two orders of magnitude. Imec is withholding details of the chips' architecture and their performance until later in the year when it has its patents filed. The research institute started a machine learning group just 18 months ago as part of its ongoing efforts to expand beyond its core work on silicon process technology. The introduction of the chips was among a handful of announcements at the opening day of the annual Imec Technology Forum here.